- supported chips
Version 0.7E beta
The CC1B C compiler supports all SX instructions and generates optimized code. The code efficiency that have put CC5X in a leading position for over 10 years also applies to CC1B.
The compiler supports 8, 16, 24 and 32 bit variables, signed and unsigned, including single bit variables, compiler generated layout of local variables, automatic ram bank updating. Many files can be generated (hex, assembly, list, error, function outline, variable list). The compiler supports structures and unions, bitfields, typedef, typecast, arrays and pointers.
Fixed and floating point math is available. The floating point math (16, 24 and 32 bit). The library code is compact and fast. Code can be optimized for size or speed.
The code generated by CC1B can be inspected at the example page.
The EXTENDED edition also supports LEANSLICE multitasking. This combination is really powerful. At 75 MHz, the SX devices will be able to schedule up to 5 tasks EACH microsecond!
The table shows the differences between the compiler editions.
The future plan is available.
The downloadable packages contains example code and txt files. The compiler is a 32 bit console application that can be started from the command line and from many IDE applications.
Download the file by using the right mouse button (browser dependent), and select Save Link As or Save Target As to save the file. Then start or unzip it.
Beta versions of the STANDARD edition can be evaluated.
The downloadable packages contain files README.TXT and SX.TXT plus other files. In addition, the PDF manual for CC5X provides general information (although not all sections applies and some instructions and registers are different).
You can send your request to : firstname.lastname@example.org.