// Generating SINGLE instructions using C SYNTAX or INLINE ASSEMBLY

#pragma chip PIC17C766 // select device

char i, a, b;
bit flag, semi;

void fx1( void);
char fx2( void);


char singleInstr( void)
{
    nop();           // NOP        ;  No operation

    i = W;           // MOVWF  f   ;  Move W to f

    i = 0;           // CLRF   f   ;  Clear f

    W = i - W;       // SUBWF  f,W ;  Subtract W from f
    i = i - W;       // SUBWF  f   ;  Subtract W from f

    W = i - 1;       // DECF   f,W ;  Decrement f
    i = i - 1;       // DECF   f   ;  Decrement f

    W = i | W;       // IORWF  f,W ;  Inclusiv OR W and f
    i = i | W;       // IORWF  f   ;  Inclusiv OR W and f

    W = i & W;       // ANDWF  f,W ;  AND W and f
    i = i & W;       // ANDWF  f   ;  AND W and f

    W = i ^ W;       // XORWF  f,W ;  Exclusiv OR W and f
    i = i ^ W;       // XORWF  f   ;  Exclusiv OR W and f

    W = i + W;       // ADDWF  f,W ;  Add W and f
    i = i + W;       // ADDWF  f   ;  Add W and f

    W = i;           // MOVF   f,W ;  Move f

    W = i ^ 255;     // COMF   f,W ;  Complement f
    i = i ^ 255;     // COMF   f   ;  Complement f

    W = i + 1;       // INCF   f,W ;  Increment f
    i = i + 1;       // INCF   f   ;  Increment f

    W = decsz(i);    // DECFSZ f,W ;  Decrement f, skip if zero
    i = decsz(i);    // DECFSZ f   ;  Decrement f, skip if zero

    W = rr( i);      // RRCF   f,W ;  Rotate right f
    i = rr( i);      // RRCF   f   ;  Rotate right f

    W = rl( i);      // RLCF   f,W ;  Rotate left f
    i = rl( i);      // RLCF   f   ;  Rotate left f

    W = swap( i);    // SWAPF  f,W ;  Swap halves f
    i = swap( i);    // SWAPF  f   ;  Swap halves f

    W = incsz(i);    // INCFSZ f,W ;  Increment f, skip if zero
    i = incsz(i);    // INCFSZ f   ;  Increment f, skip if zero

    flag = 0;        // BCF    f,b ;  Bit clear f

    semi = 1;        // BSF    f,b ;  Bit set f

    btsc( flag);     // BTFSC  f,b ;  Bit test f, skip if clear

    btss( flag);     // BTFSS  f,b ;  Bit test f, skip if set

    sleep();         // SLEEP      ;  Go into standby mode

    clrwdt();        // CLRWDT     ;  Clear watchdog timer

    return 5;        // RETLW  5   ;  Return, put literal in W

    fx1();            // CALL   fx1  ;  Call subroutine
    W = fx2();        // CALL   fx2  ;  Call subroutine

    goto X;          // GOTO   X   ;  Go to address

    W = 45;          // MOVLW  45  ;  Move literal to W

    W = W | 23;      // IORLW  23  ;  Incl. OR literal and W

    W = W & 53;      // ANDLW  53  ;  AND literal and W

    W = W ^ 12;      // XORLW  12  ;  Excl. OR literal and W

    W += 33;         // ADDLW 33

    return W;        // RETURN

    W = 23 - W;      // SUBLW 23

    W = addWFC(i);   // ADDWFC f,W
    i = addWFC(i);

    W = subWFB(i);   // SUBWFB i,W
    i = subWFB(i);

    W = rrnc(i);     // RRNCF i,W
    i = rrnc(i);

    W = rlnc(i);     // RLNCF i,W
    i = rlnc(i);

    W = decsnz(i);   // DCFSNZ i,W
    i = decsnz(i);

    W = incsnz(i);   // INFSNZ i,W
    i = incsnz(i);

    b = negate(W);   // NEGW  b,1
    i = decadj(W);   // DAW   i,1

    flag = !flag;    // BTG   0x03,flag

   #ifndef _17C42
    multiply( 50);   // MULLW 50
    multiply( i);    // MULWF i
   #endif

    i = 0xFF;        // SETF  i,1

    skipIfEQ(a);   // CPFSEQ a
    goto X;
    if (a == W)    // CPFSEQ a
        i += b;

    skipIfLT(b);   // CPFSLT b
    nop();
    if (b < W)     // CPFSLT b
        i += b;

    skipIfGT(b);   // CPFSGT b
    nop();
    if (b > W)     // CPFSGT b
        i += b;

    skipIfZero(b); // TSTFSZ b
    nop();
    if (!b)        // TSTFSZ b
        i += b;

    a = readLUInc();  /* table read-LSB-update-increment */
    a = readLU();     /* table read-LSB-update */
    a = readL();      /* table read-LSB */

    a = readHUInc();  /* table read-MSB-update-increment */
    a = readHU();     /* table read-MSB-update */
    a = readH();      /* table read-MSB */

    writeLUInc(a);    /* table write-LSB-update-increment */
    writeLU(a);       /* table write-LSB-update */
    writeL(a);        /* table write-LSB */

    writeHUInc(a);    /* table write-MSB-update-increment */
    writeHU(a);       /* table write-MSB-update */
    writeH(a);        /* table write-MSB */

X:
    return 0;
}


char sub( void)
{
   #asm
    NOP

    MOVWF  i

    CLRF   i

    SUBWF  i,W ;  Subtract W from i
    SUBWF  i   ;  Subtract W from i

    DECF   i,W ;  Decrement i
    DECF   i   ;  Decrement i

    IORWF  i,W ;  Inclusiv OR W and i
    IORWF  i   ;  Inclusiv OR W and i

    ANDWF  i,W ;  AND W and i
    ANDWF  i   ;  AND W and i

    XORWF  i,W ;  Exclusiv OR W and i
    XORWF  i   ;  Exclusiv OR W and i

    ADDWF  i,W ;  Add W and i
    ADDWF  i   ;  Add W and i

    ;MOVF   i,W ;  Move i

    COMF   i,W ;  Complement i
    COMF   i   ;  Complement i

    INCF   i,W ;  Increment i
    INCF   i   ;  Increment i

    DECFSZ i,W ;  Decrement i, skip if zero
    DECFSZ i   ;  Decrement i, skip if zero

    RRCF   i,W ;  Rotate right i
    RRCF   i   ;  Rotate right i

    RLCF   i,W ;  Rotate left i
    RLCF   i   ;  Rotate left i

    SWAPF  i,W ;  Swap halves i
    SWAPF  i   ;  Swap halves i

    INCFSZ i,W ;  Increment i, skip if zero
    INCFSZ i   ;  Increment i, skip if zero

    BCF    i,0 ;  Bit clear i

    BSF    i,2 ;  Bit set i

    BTFSC  i,3 ;  Bit test i, skip if clear

    BTFSS  i,4 ;  Bit test i, skip if set

    SLEEP      ;  Go into standby mode

    CLRWDT     ;  Clear watchdog timer

    RETLW  5   ;  Return, put literal in W

    CALL   fx1  ;  Call subroutine
    CALL   fx2  ;  Call subroutine

    GOTO   X   ;  Go to address

    MOVLW  45  ;  Move literal to W

    IORLW  23  ;  Incl. OR literal and W

    ANDLW  53  ;  AND literal and W

    XORLW  12  ;  Excl. OR literal and W

    ADDLW 33

    RETURN

    SUBLW 23

    ADDWFC i,W
    ADDWFC i

    SUBWFB i,W
    SUBWFB i

    RRNCF i,W
    RRNCF i

    RLNCF i,W
    RLNCF i

    DCFSNZ i,W
    DCFSNZ i

    INFSNZ i,W
    INFSNZ i

    NEGW  b,W
    NEGW  b

    DAW   i,W
    DAW   i

    BTG   flag

    MULLW 50
    MULWF i

    SETF  i,W
    SETF  i

    CPFSEQ a

    CPFSEQ a


    CPFSLT b

    CPFSLT b

  X:

    CPFSGT b

    CPFSGT b

    TSTFSZ b

    TSTFSZ b

    MOVFP  a,WREG
    MOVPF  WREG,b

    MOVFP  a,FSR0
    MOVPF  INDF0,b

    TABLRD 0,1,a
    TABLRD 0,0,a
    TLRD   0,a

    TABLRD 1,1,a
    TABLRD 1,0,a
    TLRD   1,a

    TABLWT 0,1,a
    TABLWT 0,0,a
    TLWT   0,a

    TABLWT 1,1,a
    TABLWT 1,0,a
    TLWT   1,a


   #endasm
    nop();
    singleInstr();
    return 88;
}

#ifndef _17C42
 #pragma origin 4000
#endif

char lsub( void)
{
    singleInstr();
    return 88;
}

void fx1( void)
{
}

char fx2( void)
{
    return 9;
}

void main(void)
{
    sub();
    lsub();
}