CC5X C compiler for PICmicro

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Enhanced 14 bit Core Support

The following table shows the implemented features for the Enhanced 14 bit Core.

Yes 32768 words of code (16 code pages of 2k words code)
Yes 4k byte RAM/SFR addressing (32 banks of 128 bytes)
Yes Automatic interrupt context save
Yes 16 level stack
Yes Automatic page updating using new MOVLP instruction
Yes Automatic bank updating using new MOVLB instruction
Yes New aritmethic instructions (ADDWFC, SUBWFB, ASLF, LSLF, LSRF) : supported by code generator and optimizer, and math libraries
Yes Continuous indirect RAM addressing : enables large tables and structures
Yes 16 bit indirect registers
Yes Pre/post inc-/decrement of 16 bit indirect registers
Yes Computed forward branch (BRW) : fast table lookup and fast task switching
Yes WREG addressing
Yes Configuration data at HEX file address 8007h and 8008h
Yes Device ID at HEX file address 8006h
Yes USER ID at HEX file address 8000h - 8003h
Yes EEPROM data at HEX file address : 0xF000 - 0xF0FF
Yes Inline assembly support for new instructions (except BRA)

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